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Altera BeMicro – expect nothing for small money


Hello again! Since I had to start forever loop on my ToDo task “Update blog”, here I am again! :) Ok, this entry will be about my new devboard, which I got from Arrow and its called Altera BeMicro. Here is how it looks like:
bemicro
Looks really small heh? :) It has FTDI USB to 2xSerial chip, Cyclone III EP3C16F256 FPGA, ISSI SRAM, 8 LEDs, edge connector with 80 pins and an empty space for EPCS4 memory.
So this board is used to preview or use Altera NIOS II soft cpu inside the FPGA, so I got the software with example and instructions available from HERE. There is PDF file inside with instructions how to run NIOS II demo on the board. There might be some problems which You can experience with it and I will try to cover them for You:

  • You have to install special modified DLL files for JTAG to be found, so remember to read README_FIRST.txt in the root directory.
  • I don’t know why, but the project, which runs on software development tool based on Eclipse has two files, where main() function is described, so read the errors after compilation. I had to delete hello_main.c (or some file like that) for compilation to complete normally (if I can call it normally with more than 100 warnings, when there are only a few lines of code).

    • So I got the NIOS II working, but guess what, You can’t close SOPC Builder, since the soft cpu will halt… If You don’t want to use PC, You have to buy the NIOS II. For development purpose there are two workarounds:

      1. You can still use the soft cpu and run SOPC Builder on Your PC
      2. Run the SOPC builder in console mode in background

    So finally, this board is useful only when You have a breakout board, since this one have only 8 LEDs :) It should be easy to connect network inteface, i2audio or other interface, since I have seen DE0,DE1,DE2 boards schematic files somewhere on Terasic. The price directly from Arrow was 180LTL (including shipping, taxes, etc) – that equals 52EUR.

    This entry was posted on April 18, 2010, 9:17 pm and is filed under FPGA/CPLD. You can follow any responses to this entry through RSS 2.0. You can leave a response, or trackback from your own site.

    1. #1 by Armandas on April 19, 2010 - 2:25 am

      Is it any good for general prototyping (i.e. anything else than the soft core)?

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    2. #2 by admin on April 19, 2010 - 2:46 pm

      With breakout board – it is. In addition that breakout board allows high frequencies (in GHz).

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